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Low-Voltage IF Transceiver with
Limiter/RSSI and Quadrature Modulator
IF BPF
LIMIN
MIXOUT
VREF
CZ
CZ
OFFSET
CORRECTION
RXIN
g m
LIMITER
LIMOUT
RXIN
LIMOUT
VREF = V CC / 2
LO
LO
RXEN
TXEN
GC
POWER
MANAGEMENT
RSSI
RSSI
I
I
VGA
TXOUT
PA
Σ
0 °
90 °
LO PHASE
SHIFTER
MAX2510
TXOUT
TRANSMIT VGA/PA
Q
Q
Figure 1. Functional Diagram
_______________Detailed Description
The following sections describe each of the blocks
shown in Figure 1.
Receiver
The receiver consists of two basic blocks: the down-
converter mixer and the limiter/received-signal-strength
indicator (RSSI) section.
The receiver inputs are the RXIN and RXIN pins, which
should be AC coupled and may require a matching
network as shown in the Typical Operating Circuit . To
design a matching network for a particular application,
consult the RXIN Input Impedance plots in the Typical
Operating Characteristics , as well as the Applications
Information sections.
Downconverter Mixer
The downconverter consists of an a double-balanced
mixer and an output buffer. The MIXOUT output, a single-
ended current source, can drive a shunt-terminated
330 ? filter (165 ? load) to more than 2Vp-p over the
entire supply range, providing excellent dynamic
range. The local oscillator (LO) input is buffered and
drives the mixer.
Limiter
The signal passes through an external IF bandpass fil-
ter into the limiter input (LIMIN). LIMIN is a single-
ended input that is biased at the VREF pin voltage. The
open-circuit input impedance is typically greater than
10k ? to VREF. For proper operation, LIMIN must be
tied to VREF through the filter-terminating impedance
(which should be less than 1k ? ). The limiter provides a
constant output level, which is largely independent of
the limiter input signal level over a 90dB input range.
The low-impedance limiter outputs provide 600mVp-p
single-ended swing (1.2Vp-p differential swing) and
can drive CMOS inputs directly.
_______________________________________________________________________________________
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